Product SiteDocumentation Site

7.2. Electronic Design Automation

This section outlines changes in the Fedora Electronic Lab for Fedora 12. Note that a number of the applications in FEL have application to a number of communities. These specific applications are outlined in the Circuit Design (which includes simulation and PCB layout) and Embedded Development sections of these notes.

7.2.1. Collaborative Code Review

One of the many faces of digital hardware design entails tracking many files to be fed to multiple EDA tools. The eventual reports or netlists are carefully analysed and logged as part of the sign-off methodology. Each company tracks these project dependent files under a certain directory structure and under a certain revision controlled system of their choice.
We have included an efficient and reliable code review solution into the Fedora collection. This trac-based peerreview solution will also help create links and seamless references between bugs, tasks, changesets and files. Project coordinators will have a more realistic the overview of the on-going project and track the progress very easy with respect to different milestones and deadlines.

7.2.2. Eclipse Default IDE

With the help and support from Fedora Eclipse team, Eclipse becomes FEL’s prime IDE for HDL IP development and documentation. This adoption is to maintain true interoperability between tools offered by different embedded software vendors.
The following plugins provided by default on the Fedora Electronic Lab platform will enhance :
  • frontend design
  • autogeneration of documentation and maintenance of professional datasheets
  • Perl/Tcl scripting (Perl modules which featured as from FEL10)
  • version controlled projects
Package Description
eclipse-veditor Helps digital IC designers/FPGA designers develop Verilog/ VHDL code on Eclipse. Provides a realtime error and warnings notification of typos, missing signals, unnecessary signals etc.
eclipse-eclox If the vhdl code entails doxygen style comments, a pdf can be autogenerated and used either during internal meetings or sent to the client.
eclipse-texlipse Since the pdf is generated from latex, the texlipse plugin will provide some additional page layout formatting and easy pdf creation. The pdf creation is now only Ctrl-S, rather than a manual click like one would do on kile. That said, kile will be removed from the FEL livedvd.
eclipse-cdt Provides Embedded C and C++ development tools.
eclipse-dltk-tcl Tcl scripts can be maintained along side with the HDL code.
eclipse-epic Perl scripts can be maintained along side with the HDL code.
eclipse-subclipse Adds Subversion integration to the Eclipse IDE
eclipse-egit Adds distributed version controlled GIT integration to the Eclipse IDE
Table 1. Eclipse Plugins selected for hardware design

7.2.3. Analog ASIC Design

Updated to the consolidation release 0.9.4. The Fedora Toped package sets the variable $TPD_GLOBAL to /usr/share/toped by default so that the user could run toped out of the box.
Graham Petley and Krustev Svilen provided 2 TELL files as a demonstration how toped can interact with Pharosc Standard Cells via toped’s GDSII and CIF parsers.
  • New graphic renderer which speeds-up the drawing up-to 3.5 times. Requires openGL version 1.4 (F-11 uses 1.3, but this is not an issue) and Virtual Buffer Objects. It will be used as a base for future graphical effects.
  • The old renderer remains to cover graphic drivers implementing older openGL versions and particularly virtual desktops.
  • The speed is also improved significantly.
  • Updates and fixes in the external interfaces. GDSII in particular.
  • New utility for conversion of Virtuoso(C) technology files to TELL.
  • TDT format updated with new records. Version updated to 0.7.
  • TDT format updated with new records. Version updated to 0.7.
  • Further updates on the user interface customization - toolbars.
  • Updates in the internal handling of the cell references. In result layer 0 is handled as a normal layer now.

Old Toped releases will not be able to read TDT files produced by this release.

There is a certain amount of code which is not yet merged to the main development trunk, including the calibre error report parser. The suggestion is to do that after the release. Some features were postponed instead of sacrificing stability at this stage.
Fedora Magic has been updated to 8.0.54.
Fedora Magic package has its documentation on a separate package called : magic-doc. The latter includes some examples of scmos and tutorials. Advanced Magic VLSI users would also be interested in reading the documentation again to grasp the fine details entailed in the 8.0 series.
  • outline vector fonts (courtesy of the freefont project), and aims to clean up a lot of problems associated with labels in Magic.
  • All the display, manipulation, OpenGL are complete.
  • Features some "cifoutput" operators for use with the new "cif paint" command, for manipulating layout using boolean operators.
  • Runtime speed has been improved.
  • Two additional menus have been added for grid manipulation and text settings.
electric has been updated to 8.09.
Please note that because most of the electric userbase use third party plugins that due to the licensing incompatibilities wih Fedora, FEL can not add those plugins. That said, Fedora Electronic Lab team understands that releasing a new upstream version would break interoperability with the user’s plugins. Hence new versions of electric will once make their way to the updates-testing repository.

7.2.4. Digital Design

New to Fedora 12,Dinotrace is a waveform viewer which understands Verilog Value Change Dumps, ASCII, and other trace formats.
It allows placing cursors, highlighting signals, searching, printing, and other capabilities superior to many commercial waveform viewers.
Dinotrace is optimized for rapid debugging. With VTRACE, a simulation failure will automatically place cursors where errors occur, add comments visible in the wave form viewer. Four mouse clicks and the errors will be highlighted in the log files, and the values of signals at the error will be seen in the source.
Fedora also ships dinotrace-mode for emacs as emacs-dinotrace-mode.
eqntott converts Boolean logic expressions into a truth table that is useful for preparing input to espresso package for logic minimization, converting logic expressions into simpler forms, and for creating truth tables. eqntott is new for Fedora 12.
New for Fedora 12, espresso takes as input a two-level representation of a two-valued (or multiplevalued) Boolean function, and produces a minimal equivalent representation. It is a boolean logic minimization tool.
Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to create executable models of CPUs for embedded software design teams.
VRQ is modular verilog parser that supports plugin tools to process verilog. Multiple tools may be invoked in a pipeline fashion within a single execution of vrq. It is a generic front-end parser with support for plugin backend customizable tools.
Fedora Alliance CVS devel repository got its 100th patch in August 2009, with respect to stability on 64 architecture and we are happy that upstream has applied all our patches for alliance. We have also built this new release for all Fedora supported testing repositories and EPEL-5 testing repository. There is also a new GUI xgra coming with this new release which is a Graph viewer.
We will not replace Alliance VLSI by herb (which was supported to be a fork of alliance) on Fedora. Before F-11’s release, herb development was active but died out after F-11 was released. Since Alliance VLSI upstream is active and responsive to our wishes, there is currently no valid reason behind obsoleting alliance in favour of herb.

7.2.5. Perl Scripts for hardware Design

This is a new package for Fedora 12.
SystemPerl is a version of the SystemC language. It is designed to expand text so that needless repetition in the language is minimized. By using sp_preproc, SystemPerl files can be expanded into C++ files at compile time, or expanded in place to make them valid stand-alone SystemC files.
perl-Verilog-Perl has been updated to version 3.123. New features include:
  • Improved warning when "do" used as identifier.
  • Fixed escaped preprocessor identifiers, bug106.
  • Fixed Perl 5.8.8 compile error, rt48226.
  • Fixed Perl 5.8.0 compile error with callbackgen.


perl-Verilog-Perl obsoletes perl-Verilog. Fedora users are advised to tune their home-made Perl scripts accordingly.